95 projects on one chip, measured one by one and as a whole die
Buy a chip and boardPut your design on the next oneAll its projects on tinytapeout.com
The chip as a whole: what its projects add up to.
Projects
on the chip
Open source
with a public repository
Transistors
across the unique designs
Logic cells
gates and flip-flops
SRAM
in foundry and custom macros
Counted inside the projects only, so these totals are smaller than the die's own figures on its run's page: the pads, Tiny Tapeout's multiplexer and controller and the fill are left out.
Tiny Tapeout puts many small designs on one chip. Start with a tile, then come back with a whole die.
Every Tiny Tapeout chip comes on a board you can plug in, with all of its projects ready to try.
Buy a chip and boardTiny Tapeout GF 26c and 26d take projects until 7 December 2026, to be made on wafer.space Run 3.
Submit a projectWhen a design outgrows a few tiles, it can have a die to itself on wafer.space Run 3: orders close 9 December 2026.
Reserve a slot
519
518
391
390
135
134
007
038
039
295
551
517
516
389
388
132
005
036
549
515
514
387
386
130
003
034
547
513
512
385
384
129
128
001
000
032
545
577
576
449
448
192
065
096
352
353
480
481
608
609
579
578
451
450
195
194
067
066
098
354
355
482
483
610
611
581
580
453
452
196
069
068
100
356
357
484
485
612
613
583
582
455
454
199
198
071
070
102
103
358
359
486
487
614
615
Every design rendered from the layout at the same scale and placed where it sits on the 3.9 × 5.1 mm die. Point at a project to see its name, and select it for its details.Every project is listed further down.
How many tiles each project took. A tile is the smallest piece of a Tiny Tapeout chip you can submit a design to.
| 1 × 1 tiles | 72 |
| 1 × 2 tiles | 17 |
| 2 × 2 tiles | 2 |
| 3 × 2 tiles | 1 |
| 4 × 2 tiles | 1 |
| 4 × 4 tiles | 2 |
| Total | 95 |
|---|
Two schedules meet here: Tiny Tapeout collects the projects and builds the die, then wafer.space manufactures it on wafer.space Run 2 and ships the parts.
Missed this one? Tiny Tapeout GF 26c and 26d take projects until 7 December 2026: submit a project.
From the wafer.space run schedule and the Tiny Tapeout GF 26a repository.
Where the area of 95 projects (9 mm² of silicon) actually went
The kinds of design on this chip.
Other digital 36 First designs 26 RISC-V and CPUs 8 Retro computing 7 Accelerators 5 Games 4 Test structures 3 Art and logos 2 Analog and mixed-signal 2 Security 1 Communications 1Each bar is one project, split the same way as above. Sorted by how much of the project is logic.
Transistor voltages and optional devices across the 95 designs
A design counts for a voltage when its standard cells, SRAM or its own transistors use it. 5 V and 6 V transistors share the thick gate oxide; a marker layer in the layout tells them apart.
| Device | Designs | Which |
|---|---|---|
| High-resistance poly resistors | 1 | VCO driven by DAC |
Not drawn by any design: Native transistors, 10 V LDMOS, MIM capacitors, MOS capacitors, Unsalicided poly resistors, Salicided poly resistors, Diffusion resistors, N-well resistors, Metal resistors, Diodes, Well diodes, Deep N-well, Bipolar transistors, Schottky diodes, Zener diodes, eFuses, One-time programmable memory, Inductors.
Only devices outside standard cells, SRAM macros and I/O pads count, since every die has those. A single test structure counts the same as a large block.
3.3 V transistors have the thin gate oxide; 5 V and 6 V ones share the thick one.
The maximum packs one cell type edge to edge with no room for wiring. Real designs need the wiring. Each box gives the most of a cell that fits with any GF180MCU library, then with the libraries this chip used.
Typical project
median logic cells/mm² of core across 39 digital projects (1,000 or more logic cells)
65% of the core covered by logic cells
Percentages compare with the buffer maximum for each design's own library: buffers are among the smallest and most common logic cells, so a design made only of buffers, packed edge to edge with no wiring, would reach 100%.
What each tile size held on this chip, and what it would hold at its densities
| Logic cells in its digital projects1,000 or more logic cells | Logic cells at this chip's density | Theoretical maximum, 7t-5V cells | |||||||
|---|---|---|---|---|---|---|---|---|---|
| Tiles | Size | Core area | Projects | Most | Median | Typical23k / mm² | Best34k / mm² | NAND gatesnand2_1 | Flip-flopsdffq_1 |
| 1 × 1 | 0.35 × 0.16 mm | 0.06 mm² | 72 | 1.9k | 1.3k | 1.3k | 1.9k | 5.1k | 880 |
| 1 × 2 | 0.35 × 0.33 mm | 0.12 mm² | 17 | 3.5k | 2.6k | 2.6k | 4.0k | 10.5k | 1.8k |
| 2 × 2 | 0.71 × 0.33 mm | 0.23 mm² | 2 | 4.9k | 3.9k | 5.3k | 8.0k | 21.3k | 3.7k |
| 3 × 2 | 1.08 × 0.33 mm | 0.36 mm² | 1 | 10.0k | 10.0k | 8.1k | 12.2k | 32.5k | 5.6k |
| 4 × 2 | 1.44 × 0.33 mm | 0.48 mm² | 1 | 4.5k | 4.5k | 10.7k | 16.3k | 43.3k | 7.5k |
| 4 × 4 | 1.44 × 0.74 mm | 1.07 mm² | 2 | 23.2k | 19.2k | 24.1k | 36.5k | 97.1k | 16.7k |
Swipe the table sideways for more columns.
Core area is the whole project. "Typical" and "best" multiply the core area by this chip's median and best core densities; SRAM and analog blocks take their area out of that. The theoretical maxima fill the core with nothing but that one cell of 7t-5V, the library most used on this chip, edge to edge with no routing.
Pick the tile size your design needs when you submit it to the next Tiny Tapeout chip, by 7 December 2026.
A digital project here is one with 1,000 or more logic cells. Solid bar: average over the core. Outlined bar: the densest 0.1 mm square outside SRAM, per mm² (a dash where memory covers most of the design). The scale ends at the buffer theoretical maximum (76k cells/mm²). The numbers are core / densest, in logic cells per mm².
| Project | Tiles | Library | Logic cells | Inside core per mm² |
Densest 0.1 mm square per mm² |
Core covered | Core mm² |
|---|---|---|---|---|---|---|---|
| DOTTEE VGA demo (TTGF26a) 353 | 1 × 1 | 7t-5V | 1,919 | 34,268 | 40,000 | 81% | 0.06* |
| BioPulse Tile 486 | 1 × 1 | 7t-5V | 1,822 | 32,536 | 41,800 | 85% | 0.06* |
| GPS_Accelerator 390 | 1 × 2 | 7t-5V | 3,457 | 29,931 | 37,200 | 81% | 0.12* |
| 7-Segment Neural Predictor 129 | 1 × 2 | 7t-5V | 3,389 | 29,342 | 34,300 | 69% | 0.12* |
| Tiny Quantum Circuit Simulator 551 | 1 × 1 | 7t-5V | 1,600 | 28,571 | 34,200 | 73% | 0.06* |
| Hardware Entropy Explorer: UART/SPI TRNG and PUF 352 | 1 × 2 | 7t-5V | 3,272 | 28,329 | 40,000 | 79% | 0.12* |
| FSK Modem 036 | 1 × 2 | 7t-5V | 3,243 | 28,078 | 36,000 | 77% | 0.12* |
| serv_soc_wb 135 | 3 × 2 | 7t-5V | 9,987 | 28,022 | 36,000 | 81% | 0.36* |
| 2x2 CNN Accelerator PE Grid with UART 005 | 1 × 1 | 7t-5V | 1,536 | 27,429 | 35,900 | 80% | 0.06* |
| BF 545 | 1 × 1 | 7t-5V | 1,521 | 27,161 | 34,800 | 77% | 0.06* |
| Balanced Ternary Multiplier 578 | 1 × 1 | 7t-5V | 1,452 | 25,929 | 30,700 | 71% | 0.06* |
| Tensor Processing Unit For GF 454 | 1 × 2 | 7t-5V | 2,941 | 25,463 | 30,200 | 70% | 0.12* |
| RRAM Characterization Platform (DC sweep + endurance + retention + histogram, GF180) 038 | 1 × 2 | 7t-5V | 2,807 | 24,303 | 32,600 | 76% | 0.12* |
| RHD2164-MCU-SPI Bridge 356 | 1 × 2 | 7t-5V | 2,793 | 24,182 | 31,800 | 83% | 0.12* |
| UNIZG-FER VGA project 611 | 1 × 1 | 7t-5V | 1,334 | 23,821 | 29,000 | 65% | 0.06* |
| teenytpu 384 | 1 × 2 | 7t-5V | 2,687 | 23,264 | 37,000 | 61% | 0.12* |
| Simon Says memory game 355 | 1 × 1 | 7t-5V | 1,301 | 23,232 | 37,200 | 64% | 0.06* |
| Video mode tester 615 | 1 × 1 | 7t-5V | 1,287 | 22,982 | 27,700 | 75% | 0.06* |
| Ring Oscillator PVT Sensor & TRNG (GF180) 549 | 1 × 1 | 7t-5V | 1,266 | 22,607 | 28,500 | 70% | 0.06* |
| 2x2 MAC Systolic array with DFT 034 | 1 × 2 | 7t-5V | 2,611 | 22,606 | 32,400 | 65% | 0.12* |
| Simple MAC Engine w/ Postproc 450 | 1 × 2 | 7t-5V | 2,601 | 22,519 | 28,500 | 65% | 0.12* |
| Memristive Crossbar Peripheral Controller (GF180) 547 | 1 × 1 | 7t-5V | 1,228 | 21,929 | 26,500 | 70% | 0.06* |
| Hardware UTF Encoder/Decoder 032 | 1 × 1 | 7t-5V | 1,220 | 21,786 | 36,100 | 51% | 0.06* |
| Programmable_Pipeline-RISC-V 039 | 4 × 4 | 7t-5V | 23,196 | 21,768 | 34,300 | 65% | 1.07* |
| SAP 8 Bit Computer 482 | 1 × 1 | 7t-5V | 1,214 | 21,679 | 27,600 | 77% | 0.06* |
| Custom DVD Screensaver for VGA 577 | 1 × 1 | 7t-5V | 1,204 | 21,500 | 29,000 | 54% | 0.06* |
| Stochastic neuron + STDP controller (merged, GF180) 358 | 1 × 2 | 7t-5V | 2,435 | 21,082 | 27,000 | 69% | 0.12* |
| xoroshiro64 070 | 1 × 1 | 7t-5V | 1,174 | 20,964 | 35,000 | 48% | 0.06* |
| Tiny Pixel Processor 195 | 2 × 2 | 7t-5V | 4,885 | 20,849 | 31,000 | 64% | 0.23* |
| wafer.space Logo VGA Screensaver 096 | 1 × 2 | 7t-5V | 2,228 | 19,290 | 27,300 | 53% | 0.12* |
| Custom DVD Screensaver for VGA 102 | 1 × 1 | 7t-5V | 1,039 | 18,554 | 28,100 | 48% | 0.06* |
| APA102 to WS2812 Translator 448 | 1 × 2 | 7t-5V | 1,899 | 16,442 | 33,300 | 42% | 0.12* |
| 8-bit RISC CPU 354 | 1 × 2 | 7t-5V | 1,728 | 14,961 | 33,100 | 43% | 0.12* |
| Simple Signal Generator 452 | 1 × 2 | 7t-5V | 1,704 | 14,753 | 26,900 | 47% | 0.12* |
| UTOSS RISC-V core 295 | 4 × 4 | 7t-5V | 15,124 | 14,193 | 34,700 | 42% | 1.07* |
| Tiny TPU Systolic Array 388 | 1 × 2 | 7t-5V | 1,529 | 13,238 | 28,300 | 41% | 0.12* |
| Very Low Resource Digital Implementation of Bioimpedance Analysis 199 | 2 × 2 | 7t-5V | 2,825 | 12,057 | 23,100 | 39% | 0.23* |
| Pong in Verilog 386 | 1 × 2 | 7t-5V | 1,136 | 9,835 | 27,800 | 26% | 0.12* |
| Minimal RV32E SoC with UART Loader 103 | 4 × 2 | 7t-5V | 4,459 | 9,383 | 34,100 | 24% | 0.48* |
Every project on this chip: an index, then grouped by what it does. Select one for its layout, its measurements and any die photographs.
All 95 projects by their address on the chip's multiplexer, with how many tiles each took and how much logic it packs.
| Address | Project | Author | Tiles | What it is | Logic cells | Cells per mm² |
|---|---|---|---|---|---|---|
| 000 | Chip ROM | Uri Shaked | 1 × 1 | Other digital | 233 | 4k |
| 001 | Tiny Tapeout Factory Test | Tiny Tapeout | 1 × 1 | Test structures | 108 | 2k |
| 003 | Counter16Outputs | Alvaro Rubio · repository @AlvaroRub | 1 × 1 | Other digital | 71 | 1k |
| 005 | 2x2 CNN Accelerator PE Grid with UART | Vidhyanandhan Sathishkumar · repository @Vidhyanandhan-01 | 1 × 1 | Accelerators | 1,536 | 27k |
| 007 | 2x2 Systolic Array Matrix Multiplier | Irene-ux · repository @Irene-ux | 1 × 1 | Other digital | 951 | 17k |
| 032 | Hardware UTF Encoder/Decoder | Rebecca G. Bettencourt · repository @RebeccaRGB | 1 × 1 | Other digital | 1,220 | 22k |
| 034 | 2x2 MAC Systolic array with DFT | Vijay Sharma · repository @Eulerianial | 1 × 2 | Other digital | 2,611 | 23k |
| 036 | FSK Modem | Vaishnavi V · repository @vvedn | 1 × 2 | Communications | 3,243 | 28k |
| 038 | RRAM Characterization Platform (DC sweep + endurance + retention + histogram, GF180) | Prof. Santhosh Sivasubramani, IIT Delhi | 1 × 2 | Test structures | 2,807 | 24k |
| 039 | Programmable_Pipeline-RISC-V | Prem · repository @PrmBRana | 4 × 4 | RISC-V and CPUs | 23,196 | 22k |
| 065 | Antonio's first Wokwi design | Antonio · repository @aglcoin04 | 1 × 1 | First designs | 16 | <1k |
| 066 | sdft wokwi 1 | Santiago Díaz Fernández de la Torre · repository @santidft | 1 × 1 | Other digital | 21 | <1k |
| 067 | Guille's first Wokwi design. | Guillermo · repository @guillermomillansolis-rgb | 1 × 1 | First designs | 13 | <1k |
| 068 | Line Follower Robot controller | Escuela Colombiana de Ingenieria Julio Gravito · repository @Arvaloez | 1 × 1 | Other digital | 302 | 5k |
| 069 | MIPS-Lite 8-bit Processor | Jesus (jalperdev) · repository @jalperdev | 1 × 1 | RISC-V and CPUs | 880 | 16k |
| 070 | xoroshiro64 | Vivek Chiranjit · repository @ChiranjitPatel | 1 × 1 | Other digital | 1,174 | 21k |
| 071 | Juan`s first Worki design | Juan Andres · repository @JuanAndres6386 | 1 × 1 | First designs | 8 | <1k |
| 096 | wafer.space Logo VGA Screensaver | Uri Shaked | 1 × 2 | Art and logos | 2,228 | 19k |
| 098 | happyhop | deadcast2 · repository @deadcast2 | 1 × 1 | Retro computing | 580 | 10k |
| 100 | Dino-7: 7-Segment Runner Game | Dr Sopes · repository @DrSopes | 1 × 1 | Games | 983 | 18k |
| 102 | Custom DVD Screensaver for VGA | Jazmin Nayeli / Kensy Buatista · repository @nayelikensy930-lang | 1 × 1 | Retro computing | 1,039 | 19k |
| 103 | Minimal RV32E SoC with UART Loader | Kris / KLuterIRV · repository @KLuterIRV | 4 × 2 | RISC-V and CPUs | 4,459 | 9k |
| 128 | Tiny Tapeout Template Copy | Pablo Ruiz · repository @pabloruizlopez2001-cloud | 1 × 1 | First designs | 16 | <1k |
| 129 | 7-Segment Neural Predictor | Abdul Hannan A. · repository @Nontinium | 1 × 2 | Accelerators | 3,389 | 29k |
| 130 | El primer diseño | Maria Saldaña · repository @02mariasv | 1 × 1 | First designs | 13 | <1k |
| 132 | Mi copia del Tiny Tapeout | Antonio · repository @VallejoPretelA | 1 × 1 | First designs | 12 | <1k |
| 134 | test1 | Alberto · repository @aperezfer | 1 × 1 | First designs | 13 | <1k |
| 135 | serv_soc_wb | Juan David Guerrero Balaguera · repository @divadnauj-GB | 3 × 2 | RISC-V and CPUs | 9,987 | 28k |
| 192 | Gen1 Digital Companion Tile | Juan Fernandez · repository @JuanCarlosFdezMlg | 1 × 1 | Other digital | 224 | 4k |
| 194 | Tiny Tapeout Template Ayman | Ayman Harraz · repository @aymanhq96 | 1 × 1 | First designs | 27 | <1k |
| 195 | Tiny Pixel Processor | Julian Schlager, Thomas Lindinger, Patrick Pollak, Sebastian Gmeiner, Simon Vogelhuber · repository @vogelhubersimon | 2 × 2 | RISC-V and CPUs | 4,885 | 21k |
| 196 | Julian_Proyecto | Julián · repository @jpachecorub | 1 × 1 | Other digital | 12 | <1k |
| 198 | Tiny Tapeout Template Copy | Alicia · repository @AliciaRRs | 1 × 1 | First designs | 18 | <1k |
| 199 | Very Low Resource Digital Implementation of Bioimpedance Analysis | Fabien · repository @fabien-soulier | 2 × 2 | Other digital | 2,825 | 12k |
| 295 | UTOSS RISC-V core | University of Toronto Open Source Students | 4 × 4 | RISC-V and CPUs | 15,124 | 14k |
| 352 | Hardware Entropy Explorer: UART/SPI TRNG and PUF | gojimmypi · repository @gojimmypi | 1 × 2 | Security | 3,272 | 28k |
| 353 | DOTTEE VGA demo (TTGF26a) | algofoogle (Anton Maurovic) · repository @algofoogle | 1 × 1 | Retro computing | 1,919 | 34k |
| 354 | 8-bit RISC CPU | Jan Kozina · repository @hofi505 | 1 × 2 | RISC-V and CPUs | 1,728 | 15k |
| 355 | Simon Says memory game | Uri Shaked · repository @urish | 1 × 1 | Games | 1,301 | 23k |
| 356 | RHD2164-MCU-SPI Bridge | Manuel Monge · repository @manuel-monge | 1 × 2 | Other digital | 2,793 | 24k |
| 357 | First Tinytapeout | Raúl · repository @raullopez54 | 1 × 1 | First designs | 8 | <1k |
| 358 | Stochastic neuron + STDP controller (merged, GF180) | Prof. Santhosh Sivasubramani, IIT Delhi | 1 × 2 | Other digital | 2,435 | 21k |
| 359 | Tiny Tapeout testtest 111233 | Suresh Devanathan · repository @idatarm | 1 × 1 | First designs | 21 | <1k |
| 384 | teenytpu | joannec34 | 1 × 2 | Accelerators | 2,687 | 23k |
| 385 | Tiny Tapeout Workshop JuanF | Juan · repository @jfm92 | 1 × 1 | First designs | 8 | <1k |
| 386 | Pong in Verilog | Jorobraun, TnTim1, ColdC5 · repository @ColdC5 | 1 × 2 | Games | 1,136 | 10k |
| 387 | Tiny Tapeout Template_1234 | Najlae · repository @neshla | 1 × 1 | Other digital | 16 | <1k |
| 388 | Tiny TPU Systolic Array | Yu Xia,Bohong Gao, Junjie Yan, Yufeng Wang, Jinyao Sun, Arthur Stanson · repository @bgao43-wq | 1 × 2 | Accelerators | 1,529 | 13k |
| 389 | Arturo's first Wokwi design | Artcraft · repository @Artcraftx107 | 1 × 1 | First designs | 20 | <1k |
| 390 | GPS_Accelerator | jpigdon · repository @jpigdon | 1 × 2 | Accelerators | 3,457 | 30k |
| 391 | Pacos first design | Paco · repository @flozgom | 1 × 1 | First designs | 8 | <1k |
| 448 | APA102 to WS2812 Translator | Squidgeefish · repository @squidgeefish | 1 × 2 | Other digital | 1,899 | 16k |
| 449 | Rafa’s first Wokwi design | Rafael Morales · repository @RafaMG10 | 1 × 1 | First designs | 12 | <1k |
| 450 | Simple MAC Engine w/ Postproc | Luca Goddijn · repository @Arty3 | 1 × 2 | Other digital | 2,601 | 23k |
| 451 | 7 segment Display Fli-Flop Try-out | Carlos David · repository @CarlosDavidTorresRico | 1 × 1 | Other digital | 15 | <1k |
| 452 | Simple Signal Generator | Matt Venn · repository @mattvenn | 1 × 2 | Other digital | 1,704 | 15k |
| 453 | DiseñoCursoTiny | José Ramñirez Díaz · repository @joserdElectronics | 1 × 1 | First designs | 4 | <1k |
| 454 | Tensor Processing Unit For GF | Mocus Zhang · repository @mocusez | 1 × 2 | Other digital | 2,941 | 25k |
| 455 | Matt’s first Wokwi design | Pedro Da Silva · repository @pedro-adasilva | 1 × 1 | First designs | 20 | <1k |
| 480 | spiPWMio | Sönke Appel · repository @FHW-Appel | 1 × 1 | Other digital | 710 | 13k |
| 481 | Basic Circuit | Izan Amador · repository @izanamador | 1 × 1 | Other digital | 14 | <1k |
| 482 | SAP 8 Bit Computer | Navneet Prasad, Mohammed Riyaj J, Akash P, Vikash R · repository @navneetprasad1311 | 1 × 1 | RISC-V and CPUs | 1,214 | 22k |
| 483 | El primer diseño de Matt para Wokwi | Marcos · repository @marcosgafer | 1 × 1 | First designs | 14 | <1k |
| 484 | BIST-8: Built-In Self-Test for 8-bit CLA Adder | Mario Garcia Jimenez · repository @mgarciajimenezAirzone | 1 × 1 | Other digital | 325 | 6k |
| 485 | Tiny Tapeout Template flip flop | Nerea · repository @nsuarezparrilla3 | 1 × 1 | First designs | 12 | <1k |
| 486 | BioPulse Tile | Roberto Medina · repository @RobMBSos | 1 × 1 | Other digital | 1,822 | 33k |
| 487 | Tiny Tapeout RJAP | Rodrigo Álvarez · repository @rodalvar23 | 1 × 1 | Other digital | 28 | 1k |
| 512 | Tiny Tapeout JMCG | Jose Manuel Cano Garcia · repository @jmcanogarcia | 1 × 1 | Other digital | 38 | 1k |
| 513 | rgb_mixer | divadnaujGB · repository @divadnauj-GB | 1 × 1 | Other digital | 832 | 15k |
| 514 | Paula's first Wokwi design | Paula García Jimémez · repository @paulagarcianm-cmd | 1 × 1 | First designs | 13 | <1k |
| 515 | microlane demo project | htfab · repository @htfab | 1 × 1 | Other digital | 365 | 7k |
| 516 | Pedro Template | Pedro Barbero · repository @PitBarber | 1 × 1 | First designs | 8 | <1k |
| 517 | Ball Display | Daniel Penas · repository @danielpenas42 | 1 × 1 | Retro computing | 906 | 16k |
| 518 | ocxpkeWokwiDesign | Jose Ramírez · repository @ocxpke | 1 × 1 | First designs | 168 | 3k |
| 519 | Number Memory Game | Daniel Gabai & Shehroze Kiani · repository @DanielGabai | 1 × 1 | Games | 787 | 14k |
| 545 | BF | Joseph Wan and Joseph Mensah · repository @Josephwann | 1 × 1 | Other digital | 1,521 | 27k |
| 547 | Memristive Crossbar Peripheral Controller (GF180) | Prof. Santhosh Sivasubramani, IIT Delhi | 1 × 1 | Analog and mixed-signal | 1,228 | 22k |
| 549 | Ring Oscillator PVT Sensor & TRNG (GF180) | Prof. Santhosh Sivasubramani, IIT Delhi | 1 × 1 | Test structures | 1,266 | 23k |
| 551 | Tiny Quantum Circuit Simulator | Oliver Hüttenhofer · repository @ohuettenhofer | 1 × 1 | Other digital | 1,600 | 29k |
| 576 | Tiny Number Simon | Ernesto M · repository @ernestomgz | 1 × 1 | Other digital | 618 | 11k |
| 577 | Custom DVD Screensaver for VGA | Alan Sigala · repository @AlanPandaSK | 1 × 1 | Retro computing | 1,204 | 22k |
| 578 | Balanced Ternary Multiplier | Serge Rabyking · repository @lanserge | 1 × 1 | Other digital | 1,452 | 26k |
| 579 | VGA_screensaver_UACJ | Angelica Morales Gallegos · repository @angelicakoehn | 1 × 1 | Art and logos | 868 | 16k |
| 580 | Tiny Tapeout Workshop Malaga 2jun2026 | Martin Gonzalez Garcia · repository @mgonzalezg | 1 × 1 | First designs | 25 | <1k |
| 581 | SPI-Controlled 8-Channel LED Driver | Grace Eysenbach · repository @gey16 | 1 × 1 | Other digital | 994 | 18k |
| 582 | Simple Sprinkler | Noah Perez · repository @noahzperez29 | 1 × 1 | Other digital | 11 | <1k |
| 583 | Universal Binary to Segment Decoder | Rebecca G. Bettencourt · repository @RebeccaRGB | 1 × 1 | Other digital | 606 | 11k |
| 608 | Rhyloo’s first Wokwi design | Jorge Benavides Macías · repository @rhyloo | 1 × 1 | First designs | 7 | <1k |
| 609 | VCO driven by DAC | algofoogle (Anton Maurovic) · repository @algofoogle | 1 × 1 | Analog and mixed-signal | 48 | 1k |
| 610 | Tiny Tapeout Marcos Fernandez | Marcos · repository @marcosfdez99 | 1 × 1 | First designs | 10 | <1k |
| 611 | UNIZG-FER VGA project | Daniel Hofman · repository @hofi505 | 1 × 1 | Retro computing | 1,334 | 24k |
| 612 | Tiny Tapeout Template | Sankori · repository @sankori-ai | 1 × 1 | First designs | 16 | <1k |
| 613 | Dyadic PWM | Maksudjon Usmonov · repository @maqsudbek | 1 × 1 | Other digital | 704 | 13k |
| 614 | ram 1 bit Copy | siningua_alagartos · repository @siningua | 1 × 1 | Other digital | 22 | <1k |
| 615 | Video mode tester | htfab · repository @htfab | 1 × 1 | Retro computing | 1,287 | 23k |
Swipe the table sideways for more columns.
The die as a whole, measured like every other design on its run: its size, pads, process features, density, precheck and photographs. See every design on wafer.space Run 2
Rendered from the layout at 2.5 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings
| Inside the core logic cells per mm² | 11k
(15% of buffer maximum) over the 12.90 mm² core: what the design itself packed |
|---|---|
| Inside the seal ring logic cells per mm² | 7k
over all 19.65 mm² of the slot, pad ring included |
| Densest mm² logic cells per mm² | 23k (30% of buffer maximum) |
| Core covered by logic | 33% |
| Transistor density transistors per mm² | 222k average, 297k in the mm² with the most logic cells |
Every figure here is measured from the public layout, the same way for every design on the run: see data and method, and how its designs used the process.
| Die | 3.93 × 5.12 mm (20.1 mm²) |
|---|---|
| Core area | 12.90 mm² inside the pad ring
the project template's, 442 µm in from each edge |
| Inside the seal ring | 19.65 mm² (the die less its 26 µm seal ring) |
| Placements | 1 on the reticle, in slot A3 |
| Bond pads | 74 |
| Transistors | 2,866,098 |
| Logic cells | 144,419 + 318,284 filler and tap cells |
| Libraries | 7t-5V (144k), 9t-5V (48) |
| SRAM | 2 macros, 2,048 bits |
| Licence | Apache-2.0 declared
Repository: Apache-2.0 in LICENSE — agrees |
|---|---|
| How it was checked | Commit and PDK pinThe licence and template were read from the repository at commit 35e70261e686. |
| Chip-on-board | Not selected at submission |
| Precheck | Passed
the check it was accepted on, 2026-07-04
Passed latest re-run, 2026-08-02, gf180mcu-precheck 1.7.3 step results and logs |
Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.
| 3.3 V | 24,850 custom transistors |
|---|---|
| 5 V | 7t-5V standard cells, 9t-5V standard cells, fd SRAM |
| Gate oxides | Thin (3.3 V) and thick (5 V/6 V) in the design itself |
| High-resistance poly resistors | 32 (190 µm²) |
| I/O library | gf180mcu_ocd_io (1140 cells) |
How this design's area splits between logic cells, SRAM, filler and tap cells, other and pad ring.
The ten standard cells this design uses most.
| Cell | Library | Instances | What it does |
|---|---|---|---|
| nand2_1 | 7t-5V | 14,564 | 2-input NAND gate |
| dffq_1 | 7t-5V | 11,440 | D flip-flop (1 bit storage) |
| oai21_1 | 7t-5V | 9,865 | OR-AND-Invert compound gate |
| nor2_1 | 7t-5V | 7,695 | 2-input NOR gate |
| dlyb_1 | 7t-5V | 7,022 | Delay buffer |
| mux2_2 | 7t-5V | 6,289 | 2-input multiplexer (2x drive) |
| buf_2 | 7t-5V | 5,930 | Buffer (2x drive) |
| aoi21_1 | 7t-5V | 5,910 | AND-OR-Invert compound gate |
| clkinv_1 | 7t-5V | 5,804 | Clock inverter |
| dffrnq_1 | 7t-5V | 5,354 | D flip-flop with reset |
Logic cells per mm² in each square millimetre of the die. Hatched outlines are SRAM macros; the red outline is the densest mm² that avoids them (23k logic cells per mm²), found by sliding a 1 mm square over the die in 0.1 mm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.
The ready-made memory blocks this design uses.
| Macro | Count | Bits each |
|---|---|---|
| gf180mcu_fd_ip_sram__sram128x8m8wm1 | 2 | 1,024 |
Before a design is made, the wafer.space platform checks it against the foundry's design rules. T26A was accepted on this check, and has been checked again since with newer rules.
All 16 steps passed, with 0 KLayout DRC errors, on 2026-07-04.
| Step | Accepted on check 334, 2026-07-04, initial | Latest re-run check 739, 2026-08-02, drc_update, gf180mcu-precheck 1.7.3 PDK open_pdks 1.0.604, LibreLane 5fe3db1 |
|---|---|---|
| KLayout.ReadLayout | passed | passed |
| KLayout.CheckTopLevel | passed | passed |
| KLayout.CheckSize | passed | passed |
| KLayout.GenerateID | passed | passed |
| KLayout.Render | passed | passed |
| KLayout.Density | passed | passed |
| Checker.KLayoutDensity | passed | passed |
| KLayout.ZeroAreaPolygons | passed | passed |
| Checker.KLayoutZeroAreaPolygons | passed | passed |
| KLayout.Antenna | passed | passed |
| Checker.KLayoutAntenna | passed | passed |
| Magic.DRC | passed | passed |
| Checker.MagicDRC | advisory warning | advisory warning |
| KLayout.DRC | passed | passed |
| Checker.KLayoutDRC | passed | passed |
| KLayout.WriteLayout | passed | passed |
| KLayout DRC errors | 0 | 0 |
| Magic DRC errors (advisory) | 4,316 | 4,316 |
| Files | steps · log (gzip) | steps · log (gzip) |
The steps of the gf180mcu-precheck LibreLane flow, as run by platform.wafer.space. The design was accepted on the newest finished check before it was submitted; later re-runs check the same file with updated rules. KLayout DRC is the sign-off check. Magic DRC is advisory: its count does not stop a design. In the logs, Magic's "Error while reading cell" lines about fill cells are messages from its reader, not check failures.
Everything on this page is measured from the public layout; the dates come from the published schedules.
The full written analysis is the density report. The measurements behind it:
Generated by ws-run-reports from layout/T26A.oas (md5 8fdfc77220918a548aa0b9707aa0e5ff).
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