Tiny Tapeout GF 26a · Die T26A on wafer.space Run 2

BIST-8: Built-In Self-Test for 8-bit CLA Adder

484 · Other digital · 1 × 1 tile

by Mario Garcia Jimenez

Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

325 logic cells: too few for density figures, which are given for projects of 1,000 or more.

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

BIST architecture for an 8-bit Carry-Lookahead Adder. Includes 12-bit LFSR pattern generator, 16-bit MISR response compactor, fault injection and 4-state FSM controller. Golden signature 0xCF77.

Size347 × 161 µm (0.056 mm²)
Macrott_um_mgj_bist8
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26a
Tiles1 × 1 at column 6, row 16 of the tile grid
Mux address484
LanguageVerilog
Clock10 MHz
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors12,510
Logic cells325 + 1,430 filler and tap cells
Libraries 7t-5V (325)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

17%
76%
  • Logic cells 0.01 mm² (17%)
  • Filler and tap cells 0.04 mm² (76%)
  • Other 4,033 µm² (7%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
clkinv_17t-5V 39Clock inverter
dffrnq_17t-5V 39D flip-flop with reset
dlyb_17t-5V 28Delay buffer
aoi22_17t-5V 26AND-OR-Invert (2x2 inputs)
buf_27t-5V 24Buffer (2x drive)
nand2_17t-5V 242-input NAND gate
clkbuf_27t-5V 17Clock buffer (2x drive)
nor2_17t-5V 172-input NOR gate
aoi21_17t-5V 15AND-OR-Invert compound gate
oai21_17t-5V 10OR-AND-Invert compound gate

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.