Tiny Tapeout GF 26a · Die T26A on wafer.space Run 2

UTOSS RISC-V core

295 · RISC-V and CPUs · 4 × 4 tiles

by University of Toronto Open Source Students

Layout render of UTOSS RISC-V core

Rendered from the layout at 0.90 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

Logic density

Core average
logic cells per mm²		14k (19% of buffer maximum)
Densest 0.1 mm square
logic cells per mm²		35k (46% of buffer maximum)
Core covered by logic42%
Transistor density
transistors per mm²		268k average, 330k in the 0.1 mm square with the most logic cells

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

RV32I core implementation

Source repository Its page on Tiny TapeoutBuy a chip and board

Size1440 × 737 µm (1.061 mm²)
Macrott_um_utoss_riscv
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26a
Tiles4 × 4 at column 0, row 15 of the tile grid
Mux address295
LanguageSystemVerilog
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors285,436
Logic cells15,124 + 30,510 filler and tap cells
Libraries 7t-5V (15k)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

42%
56%
  • Logic cells 0.44 mm² (42%)
  • Filler and tap cells 0.60 mm² (56%)
  • Other 0.02 mm² (2%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
nand2_17t-5V 2,0712-input NAND gate
dffq_17t-5V 2,023D flip-flop (1 bit storage)
oai21_17t-5V 1,734OR-AND-Invert compound gate
dlyb_17t-5V 1,312Delay buffer
clkbuf_27t-5V 962Clock buffer (2x drive)
mux4_17t-5V 7754-input multiplexer
buf_17t-5V 689Buffer
buf_27t-5V 664Buffer (2x drive)
aoi22_17t-5V 598AND-OR-Invert (2x2 inputs)
nor2_17t-5V 5822-input NOR gate

Logic density map

0 logic cells, 2,031 transistors 0 logic cells, 2,128 transistors 0 logic cells, 2,105 transistors 0 logic cells, 2,131 transistors 0 logic cells, 2,103 transistors 0 logic cells, 2,128 transistors 0 logic cells, 2,129 transistors 0 logic cells, 2,130 transistors 0 logic cells, 2,127 transistors 0 logic cells, 2,128 transistors 0 logic cells, 2,131 transistors 0 logic cells, 2,105 transistors 0 logic cells, 2,126 transistors 0 logic cells, 2,105 transistors 0 logic cells, 759 transistors 15 logic cells, 2,149 transistors 32 logic cells, 2,292 transistors 42 logic cells, 2,326 transistors 98 logic cells, 2,710 transistors 121 logic cells, 2,763 transistors 138 logic cells, 2,895 transistors 94 logic cells, 2,687 transistors 109 logic cells, 2,728 transistors 62 logic cells, 2,522 transistors 75 logic cells, 2,421 transistors 146 logic cells, 2,630 transistors 133 logic cells, 2,626 transistors 28 logic cells, 2,319 transistors 0 logic cells, 2,193 transistors 0 logic cells, 791 transistors 77 logic cells, 2,389 transistors 215 logic cells, 2,958 transistors 249 logic cells, 3,022 transistors 227 logic cells, 3,100 transistors 219 logic cells, 3,109 transistors 237 logic cells, 3,208 transistors 251 logic cells, 3,411 transistors 262 logic cells, 3,344 transistors 241 logic cells, 3,229 transistors 243 logic cells, 3,142 transistors 244 logic cells, 2,988 transistors 212 logic cells, 2,976 transistors 44 logic cells, 2,361 transistors 0 logic cells, 2,193 transistors 0 logic cells, 790 transistors 202 logic cells, 2,703 transistors 221 logic cells, 2,882 transistors 257 logic cells, 3,022 transistors 246 logic cells, 2,992 transistors 248 logic cells, 3,167 transistors 271 logic cells, 3,117 transistors 321 logic cells, 3,489 transistors 311 logic cells, 3,248 transistors 299 logic cells, 3,299 transistors 301 logic cells, 3,209 transistors 297 logic cells, 3,126 transistors 280 logic cells, 3,205 transistors 200 logic cells, 2,893 transistors 10 logic cells, 2,245 transistors 0 logic cells, 790 transistors 117 logic cells, 2,563 transistors 253 logic cells, 3,097 transistors 291 logic cells, 3,059 transistors 265 logic cells, 3,122 transistors 268 logic cells, 3,055 transistors 328 logic cells, 3,167 transistors 299 logic cells, 3,421 transistors 313 logic cells, 3,331 transistors 311 logic cells, 3,153 transistors 300 logic cells, 3,141 transistors 294 logic cells, 3,186 transistors 279 logic cells, 3,064 transistors 272 logic cells, 3,115 transistors 92 logic cells, 2,627 transistors 0 logic cells, 791 transistors 13 logic cells, 2,167 transistors 82 logic cells, 2,494 transistors 222 logic cells, 3,043 transistors 231 logic cells, 3,044 transistors 245 logic cells, 3,111 transistors 279 logic cells, 3,115 transistors 308 logic cells, 3,387 transistors 295 logic cells, 3,272 transistors 261 logic cells, 3,113 transistors 248 logic cells, 3,088 transistors 264 logic cells, 3,124 transistors 239 logic cells, 3,067 transistors 230 logic cells, 3,023 transistors 38 logic cells, 2,426 transistors 0 logic cells, 791 transistors 0 logic cells, 2,116 transistors 19 logic cells, 2,263 transistors 87 logic cells, 2,594 transistors 109 logic cells, 2,649 transistors 108 logic cells, 2,664 transistors 109 logic cells, 2,679 transistors 137 logic cells, 2,717 transistors 124 logic cells, 2,736 transistors 107 logic cells, 2,673 transistors 107 logic cells, 2,662 transistors 118 logic cells, 2,710 transistors 98 logic cells, 2,668 transistors 75 logic cells, 2,581 transistors 9 logic cells, 2,259 transistors 0 logic cells, 790 transistors 0 logic cells, 694 transistors 0 logic cells, 727 transistors 1 logic cells, 729 transistors 1 logic cells, 740 transistors 0 logic cells, 727 transistors 0 logic cells, 737 transistors 0 logic cells, 736 transistors 0 logic cells, 739 transistors 0 logic cells, 734 transistors 0 logic cells, 737 transistors 0 logic cells, 738 transistors 0 logic cells, 729 transistors 0 logic cells, 735 transistors 0 logic cells, 729 transistors 0 logic cells, 262 transistors Densest SRAM-free 0.1 mm square: 347 logic cells 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1k 3k 4k 10k 12k 14k 9k 11k 6k 7k 15k 13k 3k 0 8k 21k 25k 23k 22k 24k 25k 26k 24k 24k 24k 21k 4k 0 20k 22k 26k 25k 25k 27k 32k 31k 30k 30k 30k 28k 20k 1k 12k 25k 29k 26k 27k 33k 30k 31k 31k 30k 29k 28k 27k 9k 1k 8k 22k 23k 24k 28k 31k 29k 26k 25k 26k 24k 23k 4k 0 2k 9k 11k 11k 11k 14k 12k 11k 11k 12k 10k 7k 1k

Logic cells per mm² in each 0.1 mm square of the project (counted in the square, scaled up to a mm²). Hatched outlines are SRAM macros; the red outline is the densest 0.1 mm square that avoids them (35k logic cells per mm²), found by sliding a 0.1 mm square over the project in 20 µm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

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