Tiny Tapeout GF 26a · Die T26A on wafer.space Run 2

Programmable_Pipeline-RISC-V

039 · RISC-V and CPUs · 4 × 4 tiles

by Prem

Rendered from the layout at 0.90 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

Logic density

Core average
logic cells per mm²
22k (29% of buffer maximum)
Densest 0.1 mm square
logic cells per mm²
34k (45% of buffer maximum)
Core covered by logic65%
Transistor density
transistors per mm²
299k average, 338k in the 0.1 mm square with the most logic cells

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

Zero to ASIC demo project

Size1440 × 737 µm (1.061 mm²)
Macrott_um_prem_pipeline_test
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26a
Tiles4 × 4 at column 0, row 11 of the tile grid
Mux address39
LanguageVerilog
Clock25 MHz
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors318,349
Logic cells23,196 + 35,492 filler and tap cells
Libraries 7t-5V (23k)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

65%
33%
  • Logic cells 0.69 mm² (65%)
  • Filler and tap cells 0.35 mm² (33%)
  • Other 0.02 mm² (2%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
dffq_17t-5V 3,858D flip-flop (1 bit storage)
oai21_17t-5V 2,182OR-AND-Invert compound gate
mux2_27t-5V 2,1272-input multiplexer (2x drive)
dlyb_17t-5V 1,907Delay buffer
nand2_17t-5V 1,8322-input NAND gate
clkbuf_27t-5V 1,657Clock buffer (2x drive)
buf_17t-5V 1,128Buffer
buf_27t-5V 1,111Buffer (2x drive)
clkbuf_17t-5V 1,024Clock buffer
nor2_17t-5V 8212-input NOR gate

Logic density map

16 logic cells, 2,114 transistors 115 logic cells, 2,674 transistors 175 logic cells, 2,859 transistors 166 logic cells, 2,956 transistors 169 logic cells, 2,943 transistors 191 logic cells, 3,052 transistors 190 logic cells, 3,021 transistors 179 logic cells, 3,021 transistors 179 logic cells, 2,949 transistors 168 logic cells, 2,999 transistors 173 logic cells, 3,025 transistors 168 logic cells, 2,903 transistors 162 logic cells, 2,933 transistors 48 logic cells, 2,405 transistors 0 logic cells, 759 transistors 95 logic cells, 2,556 transistors 221 logic cells, 3,245 transistors 250 logic cells, 3,381 transistors 243 logic cells, 3,312 transistors 233 logic cells, 3,249 transistors 229 logic cells, 3,312 transistors 282 logic cells, 3,362 transistors 299 logic cells, 3,405 transistors 284 logic cells, 3,418 transistors 255 logic cells, 3,360 transistors 249 logic cells, 3,441 transistors 249 logic cells, 3,376 transistors 260 logic cells, 3,398 transistors 171 logic cells, 3,121 transistors 0 logic cells, 781 transistors 164 logic cells, 2,887 transistors 224 logic cells, 3,265 transistors 255 logic cells, 3,130 transistors 241 logic cells, 3,154 transistors 226 logic cells, 3,214 transistors 228 logic cells, 3,279 transistors 242 logic cells, 3,330 transistors 235 logic cells, 3,293 transistors 229 logic cells, 3,364 transistors 223 logic cells, 3,284 transistors 227 logic cells, 3,366 transistors 223 logic cells, 3,320 transistors 242 logic cells, 3,371 transistors 170 logic cells, 3,162 transistors 0 logic cells, 773 transistors 102 logic cells, 2,538 transistors 227 logic cells, 2,991 transistors 223 logic cells, 2,900 transistors 231 logic cells, 3,046 transistors 243 logic cells, 3,162 transistors 247 logic cells, 3,182 transistors 226 logic cells, 3,246 transistors 289 logic cells, 3,310 transistors 242 logic cells, 3,115 transistors 259 logic cells, 3,192 transistors 230 logic cells, 3,202 transistors 254 logic cells, 3,157 transistors 255 logic cells, 3,182 transistors 206 logic cells, 2,944 transistors 25 logic cells, 867 transistors 175 logic cells, 2,643 transistors 285 logic cells, 3,131 transistors 273 logic cells, 3,094 transistors 262 logic cells, 3,062 transistors 271 logic cells, 3,068 transistors 274 logic cells, 3,049 transistors 305 logic cells, 3,209 transistors 323 logic cells, 3,428 transistors 328 logic cells, 3,189 transistors 313 logic cells, 3,107 transistors 312 logic cells, 3,202 transistors 305 logic cells, 3,117 transistors 306 logic cells, 3,063 transistors 277 logic cells, 3,056 transistors 66 logic cells, 1,024 transistors 202 logic cells, 2,774 transistors 312 logic cells, 3,036 transistors 312 logic cells, 3,050 transistors 293 logic cells, 2,869 transistors 277 logic cells, 2,901 transistors 272 logic cells, 2,993 transistors 239 logic cells, 3,081 transistors 326 logic cells, 3,197 transistors 292 logic cells, 3,059 transistors 280 logic cells, 3,097 transistors 296 logic cells, 3,026 transistors 293 logic cells, 3,034 transistors 268 logic cells, 2,993 transistors 272 logic cells, 3,105 transistors 64 logic cells, 1,027 transistors 156 logic cells, 2,640 transistors 199 logic cells, 2,957 transistors 230 logic cells, 3,029 transistors 185 logic cells, 2,823 transistors 145 logic cells, 2,731 transistors 242 logic cells, 2,952 transistors 234 logic cells, 2,998 transistors 244 logic cells, 2,986 transistors 223 logic cells, 2,978 transistors 223 logic cells, 2,970 transistors 214 logic cells, 2,929 transistors 224 logic cells, 2,931 transistors 239 logic cells, 3,021 transistors 181 logic cells, 2,793 transistors 33 logic cells, 931 transistors 0 logic cells, 694 transistors 38 logic cells, 829 transistors 60 logic cells, 877 transistors 38 logic cells, 854 transistors 4 logic cells, 728 transistors 10 logic cells, 756 transistors 45 logic cells, 863 transistors 35 logic cells, 843 transistors 31 logic cells, 833 transistors 33 logic cells, 836 transistors 25 logic cells, 813 transistors 21 logic cells, 783 transistors 4 logic cells, 740 transistors 0 logic cells, 729 transistors 0 logic cells, 262 transistors Densest SRAM-free 0.1 mm square: 343 logic cells 2k 11k 17k 17k 17k 19k 19k 18k 18k 17k 17k 17k 16k 5k 9k 22k 25k 24k 23k 23k 28k 30k 28k 25k 25k 25k 26k 17k 16k 22k 25k 24k 23k 23k 24k 23k 23k 22k 23k 22k 24k 17k 10k 23k 22k 23k 24k 25k 23k 29k 24k 26k 23k 25k 25k 21k 17k 28k 27k 26k 27k 27k 30k 32k 33k 31k 31k 30k 31k 28k 20k 31k 31k 29k 28k 27k 24k 33k 29k 28k 30k 29k 27k 27k 16k 20k 23k 18k 14k 24k 23k 24k 22k 22k 21k 22k 24k 18k

Logic cells per mm² in each 0.1 mm square of the project (counted in the square, scaled up to a mm²). Hatched outlines are SRAM macros; the red outline is the densest 0.1 mm square that avoids them (34k logic cells per mm²), found by sliding a 0.1 mm square over the project in 20 µm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.