Tiny Tapeout GF 0.3 · Die T0P3 on wafer.space Run 2

TinyQV RISC-V SoC

199 · RISC-V and CPUs · 4 × 2 tiles

by Michael Bell

Layout render of TinyQV RISC-V SoC

Rendered from the layout at 0.90 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

Logic density

Core average
logic cells per mm²		26k (35% of buffer maximum)
Densest 0.1 mm square
logic cells per mm²		35k (46% of buffer maximum)
Core covered by logic70%
Transistor density
transistors per mm²		296k average, 327k in the 0.1 mm square with the most logic cells

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

A Risc-V SoC for Tiny Tapeout

Source repository Its page on Tiny TapeoutBuy a chip and board

Size1440 × 325 µm (0.469 mm²)
Macrott_um_MichaelBell_tinyQV
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 0.3
Tiles4 × 2 at column 7, row 6 of the tile grid
Mux address199
LanguageVerilog
Clock24 MHz
Built withLibreLane 3.1.0.dev1, open_pdks 9233c19260cd
Transistors140,890
Logic cells12,513 + 15,819 filler and tap cells
Libraries 7t-5V (13k)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself
High-resistance poly resistors27 (2,700 µm²)

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

70%
25%
  • Logic cells 0.33 mm² (70%)
  • Filler and tap cells 0.12 mm² (25%)
  • Other 0.02 mm² (5%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
dffq_17t-5V 1,733D flip-flop (1 bit storage)
nand2_17t-5V 1,4082-input NAND gate
buf_27t-5V 1,037Buffer (2x drive)
oai21_17t-5V 960OR-AND-Invert compound gate
aoi21_17t-5V 942AND-OR-Invert compound gate
buf_17t-5V 724Buffer
nor2_17t-5V 6332-input NOR gate
mux2_27t-5V 5622-input multiplexer (2x drive)
clkinv_17t-5V 483Clock inverter
clkbuf_27t-5V 362Clock buffer (2x drive)

Logic density map

234 logic cells, 2,748 transistors 254 logic cells, 3,030 transistors 227 logic cells, 2,340 transistors 214 logic cells, 2,206 transistors 276 logic cells, 2,937 transistors 284 logic cells, 2,892 transistors 233 logic cells, 2,864 transistors 230 logic cells, 2,857 transistors 282 logic cells, 3,035 transistors 267 logic cells, 2,960 transistors 279 logic cells, 3,229 transistors 272 logic cells, 2,812 transistors 264 logic cells, 2,966 transistors 321 logic cells, 3,092 transistors 82 logic cells, 1,030 transistors 267 logic cells, 2,939 transistors 261 logic cells, 3,133 transistors 308 logic cells, 3,143 transistors 315 logic cells, 3,045 transistors 336 logic cells, 3,218 transistors 316 logic cells, 3,086 transistors 315 logic cells, 3,034 transistors 248 logic cells, 2,955 transistors 267 logic cells, 3,104 transistors 221 logic cells, 3,333 transistors 316 logic cells, 3,217 transistors 323 logic cells, 3,113 transistors 310 logic cells, 3,238 transistors 327 logic cells, 3,195 transistors 93 logic cells, 1,118 transistors 246 logic cells, 2,975 transistors 242 logic cells, 3,010 transistors 251 logic cells, 3,088 transistors 290 logic cells, 3,031 transistors 282 logic cells, 3,297 transistors 276 logic cells, 3,058 transistors 269 logic cells, 2,927 transistors 236 logic cells, 3,064 transistors 245 logic cells, 3,424 transistors 237 logic cells, 3,354 transistors 206 logic cells, 3,412 transistors 251 logic cells, 3,223 transistors 324 logic cells, 3,277 transistors 301 logic cells, 3,256 transistors 85 logic cells, 1,083 transistors 64 logic cells, 636 transistors 58 logic cells, 617 transistors 63 logic cells, 658 transistors 62 logic cells, 601 transistors 63 logic cells, 673 transistors 57 logic cells, 623 transistors 57 logic cells, 570 transistors 46 logic cells, 704 transistors 47 logic cells, 722 transistors 45 logic cells, 749 transistors 43 logic cells, 728 transistors 54 logic cells, 710 transistors 79 logic cells, 686 transistors 77 logic cells, 664 transistors 15 logic cells, 201 transistors Densest SRAM-free 0.1 mm square: 346 logic cells 23k 25k 23k 21k 28k 28k 23k 23k 28k 27k 28k 27k 26k 32k 27k 26k 31k 31k 34k 32k 31k 25k 27k 22k 32k 32k 31k 33k 25k 24k 25k 29k 28k 28k 27k 24k 24k 24k 21k 25k 32k 30k

Logic cells per mm² in each 0.1 mm square of the project (counted in the square, scaled up to a mm²). Hatched outlines are SRAM macros; the red outline is the densest 0.1 mm square that avoids them (35k logic cells per mm²), found by sliding a 0.1 mm square over the project in 20 µm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.

TinyQV RISC-V SoC has been made on 11 shuttles since Apr 2024. Every version, oldest first, with this one in bold:

  1. Apr 2024 · Tiny Tapeout 6 TinyQV RISC-V SoC — 2 × 2 tiles
  2. Nov 2024 · Tiny Tapeout IHP 0.2 TinyQV RISC-V SoC — 2 × 2 tiles
  3. Mar 2025 · Tiny Tapeout IHP 25a TinyQV RISC-V SoC — 3 × 2 tiles
  4. Sep 2025 · Tiny Tapeout IHP 25b TinyQV - Crowdsourced RISC-V SoC — 5 × 4 tiles, with the peripherals of Tiny Tapeout's RISC-V competition
  5. Sep 2025 · Tiny Tapeout SKY 25a TinyQV 'Asteroids' - Crowdsourced RISC-V SoC — 8 × 4 tiles, 'Asteroids', with crowdsourced peripherals TinyQV 'Berzerk' - Crowdsourced RISC-V SoC — 4 × 4 tiles, 'Berzerk', with crowdsourced peripherals
  6. Nov 2025 · Tiny Tapeout SKY 25b TinyQV RISC-V SoC — 3 × 2 tiles
  7. Nov 2025 · Tiny Tapeout GF 0.1 TinyQV RISC-V SoC — in a shared block
  8. Nov 2025 · Tiny Tapeout GF 0.2 TinyQV RISC-V SoC — 3 × 4 tiles
  9. Dec 2025 · wafer.space Run 1 TQVA TinyQV - Crowdsourced RISC-V SoC — ½ × ½ slot TQVB TinyQV - Crowdsourced RISC-V SoC (0.5x1) — ½ × 1 slot TQVC TinyQV - Crowdsourced RISC-V SoC (1x0.5) — 1 × ½ slot
  10. Jun 2026 · Tiny Tapeout GF 0.3 TinyQV RISC-V SoC — 4 × 2 tiles
  11. Jul 2026 · wafer.space Run 2 TQVA TinyQV - Crowdsourced RISC-V SoC — ½ × ½ slot TQVC TinyQV - Crowdsourced RISC-V SoC (1x0.5) — 1 × ½ slot TQVD TinyQV - RISC-V SoC with HDMI output — ½ × ½ slot, 3.3 V standard cells and SRAM, HDMI output TQVE TinyQV - RISC-V SoC with experimental pad setup — ½ × ½ slot, 3.3 V, with an experimental pad setup

Tiny Tapeout tile Google shuttle wafer.space die

From a Tiny Tapeout tile to a whole die

TinyQV RISC-V SoC started as a few tiles on Tiny Tapeout 6 and went on to dies of its own on wafer.space Run 1 and wafer.space Run 2. When your design outgrows its tiles, a whole die on a wafer.space run is the next step.

Reserve a slot on wafer.space Run 3

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Submit a project

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.

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