Tiny Tapeout GF 0.3 · Die T0P3 on wafer.space Run 2
tnt's recreation of a 555 on GF180mcu
103 · Analog and mixed-signal · 1 × 2 tiles
by Sylvain Munaut · repository @smunaut
Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings
Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.
Just a simple classic timer IC re-imagined
Source repository Its page on Tiny TapeoutBuy a chip and board
| Size | 329 × 325 µm (0.107 mm²) |
|---|---|
| Macro | tt_um_tnt_gf_555 |
| Files | documentation · licence · layout and netlist in Tiny Tapeout GF 0.3 |
| Tiles | 1 × 2 at column 7, row 11 of the tile grid |
| Mux address | 103 |
| Language | Analog |
| Transistors | 228 |
| Logic cells | 0 |
| SRAM | No SRAM |
Process features
Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.
| 5 V | 216 custom transistors |
|---|---|
| Gate oxides | Thick only (5 V/6 V) in the design itself |
| MOS capacitors | 12 (1,200 µm²) |
| High-resistance poly resistors | 8 (236 µm²) |
| Unsalicided poly resistors | 12 (102 µm²) |
Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.