Tiny Tapeout GF 0.2 · Die TTPG on wafer.space Run 1: the power-gated edition

TinyQV RISC-V SoC

039 · RISC-V and CPUs · 3 × 4 tiles

by Michael Bell

Layout render of TinyQV RISC-V SoC

Rendered from the layout at 0.67 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

Logic density

Core average
logic cells per mm²		25k (33% of buffer maximum)
Densest 0.1 mm square
logic cells per mm²		37k (49% of buffer maximum)
Core covered by logic74%
Transistor density
transistors per mm²		319k average, 314k in the 0.1 mm square with the most logic cells

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

A Risc-V SoC for Tiny Tapeout

Source repository Its page on Tiny TapeoutBuy this chip

Size1076 × 737 µm (0.793 mm²)
Macrott_um_MichaelBell_tinyQV
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 0.2
Tiles3 × 4 at column 0, row 11 of the tile grid
Mux address39
LanguageVerilog
Clock24 MHz
Built withLibreLane 3.0.0.dev45, open_pdks 8fa792c6f7db
Transistors254,546
Logic cells20,084 + 25,932 filler and tap cells
Libraries 7t-5V (20k)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

74%
23%
  • Logic cells 0.59 mm² (74%)
  • Filler and tap cells 0.19 mm² (23%)
  • Other 0.02 mm² (2%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
nand2_17t-5V 2,3262-input NAND gate
oai21_17t-5V 1,905OR-AND-Invert compound gate
dffq_47t-5V 1,638D flip-flop (1 bit storage, 4x drive)
aoi21_17t-5V 1,458AND-OR-Invert compound gate
dffq_17t-5V 1,343D flip-flop (1 bit storage)
nor2_17t-5V 1,2052-input NOR gate
inv_17t-5V 978Inverter
buf_47t-5V 964Buffer (4x drive)
mux2_27t-5V 6522-input multiplexer (2x drive)
aoi22_17t-5V 647AND-OR-Invert (2x2 inputs)

Logic density map

104 logic cells, 2,596 transistors 239 logic cells, 3,188 transistors 268 logic cells, 3,107 transistors 262 logic cells, 3,112 transistors 271 logic cells, 3,071 transistors 265 logic cells, 3,157 transistors 215 logic cells, 2,911 transistors 245 logic cells, 3,039 transistors 266 logic cells, 3,118 transistors 249 logic cells, 3,082 transistors 92 logic cells, 1,866 transistors 174 logic cells, 3,195 transistors 201 logic cells, 3,429 transistors 203 logic cells, 3,406 transistors 280 logic cells, 3,260 transistors 260 logic cells, 3,277 transistors 277 logic cells, 3,296 transistors 272 logic cells, 3,344 transistors 298 logic cells, 3,372 transistors 277 logic cells, 3,346 transistors 279 logic cells, 3,260 transistors 95 logic cells, 1,951 transistors 186 logic cells, 3,269 transistors 208 logic cells, 3,413 transistors 176 logic cells, 3,444 transistors 215 logic cells, 3,342 transistors 275 logic cells, 3,320 transistors 249 logic cells, 3,360 transistors 314 logic cells, 3,297 transistors 286 logic cells, 3,247 transistors 252 logic cells, 3,385 transistors 266 logic cells, 3,391 transistors 140 logic cells, 2,236 transistors 206 logic cells, 2,957 transistors 270 logic cells, 3,236 transistors 263 logic cells, 3,259 transistors 225 logic cells, 3,392 transistors 269 logic cells, 3,336 transistors 304 logic cells, 3,303 transistors 325 logic cells, 3,276 transistors 323 logic cells, 3,210 transistors 312 logic cells, 3,283 transistors 359 logic cells, 3,171 transistors 262 logic cells, 2,226 transistors 276 logic cells, 3,152 transistors 280 logic cells, 3,342 transistors 325 logic cells, 3,218 transistors 304 logic cells, 3,300 transistors 288 logic cells, 3,412 transistors 269 logic cells, 3,332 transistors 270 logic cells, 3,324 transistors 244 logic cells, 3,447 transistors 289 logic cells, 3,347 transistors 306 logic cells, 3,190 transistors 185 logic cells, 2,389 transistors 236 logic cells, 3,190 transistors 268 logic cells, 3,330 transistors 285 logic cells, 3,328 transistors 270 logic cells, 3,341 transistors 247 logic cells, 3,445 transistors 291 logic cells, 3,310 transistors 271 logic cells, 3,439 transistors 271 logic cells, 3,456 transistors 261 logic cells, 3,373 transistors 246 logic cells, 3,372 transistors 202 logic cells, 2,295 transistors 270 logic cells, 3,152 transistors 232 logic cells, 3,442 transistors 240 logic cells, 3,343 transistors 260 logic cells, 3,351 transistors 218 logic cells, 3,367 transistors 196 logic cells, 2,865 transistors 263 logic cells, 2,997 transistors 244 logic cells, 3,194 transistors 214 logic cells, 3,084 transistors 262 logic cells, 3,310 transistors 174 logic cells, 2,409 transistors 113 logic cells, 1,015 transistors 113 logic cells, 1,028 transistors 84 logic cells, 1,173 transistors 98 logic cells, 1,107 transistors 76 logic cells, 1,088 transistors 56 logic cells, 843 transistors 54 logic cells, 883 transistors 97 logic cells, 1,117 transistors 81 logic cells, 1,096 transistors 57 logic cells, 952 transistors 21 logic cells, 662 transistors Densest SRAM-free 0.1 mm square: 369 logic cells 10k 24k 27k 26k 27k 26k 21k 24k 27k 25k 9k 17k 20k 20k 28k 26k 28k 27k 30k 28k 28k 9k 19k 21k 18k 21k 27k 25k 31k 29k 25k 27k 14k 21k 27k 26k 22k 27k 30k 32k 32k 31k 36k 26k 28k 28k 32k 30k 29k 27k 27k 24k 29k 31k 18k 24k 27k 28k 27k 25k 29k 27k 27k 26k 25k 20k 27k 23k 24k 26k 22k 20k 26k 24k 21k 26k 17k

Logic cells per mm² in each 0.1 mm square of the project (counted in the square, scaled up to a mm²). Hatched outlines are SRAM macros; the red outline is the densest 0.1 mm square that avoids them (37k logic cells per mm²), found by sliding a 0.1 mm square over the project in 20 µm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.

TinyQV RISC-V SoC has been made on 11 shuttles since Apr 2024. Every version, oldest first, with this one in bold:

  1. Apr 2024 · Tiny Tapeout 6 TinyQV RISC-V SoC — 2 × 2 tiles
  2. Nov 2024 · Tiny Tapeout IHP 0.2 TinyQV RISC-V SoC — 2 × 2 tiles
  3. Mar 2025 · Tiny Tapeout IHP 25a TinyQV RISC-V SoC — 3 × 2 tiles
  4. Sep 2025 · Tiny Tapeout IHP 25b TinyQV - Crowdsourced RISC-V SoC — 5 × 4 tiles, with the peripherals of Tiny Tapeout's RISC-V competition
  5. Sep 2025 · Tiny Tapeout SKY 25a TinyQV 'Asteroids' - Crowdsourced RISC-V SoC — 8 × 4 tiles, 'Asteroids', with crowdsourced peripherals TinyQV 'Berzerk' - Crowdsourced RISC-V SoC — 4 × 4 tiles, 'Berzerk', with crowdsourced peripherals
  6. Nov 2025 · Tiny Tapeout SKY 25b TinyQV RISC-V SoC — 3 × 2 tiles
  7. Nov 2025 · Tiny Tapeout GF 0.1 TinyQV RISC-V SoC — in a shared block
  8. Nov 2025 · Tiny Tapeout GF 0.2 TinyQV RISC-V SoC — 3 × 4 tiles
  9. Dec 2025 · wafer.space Run 1 TQVA TinyQV - Crowdsourced RISC-V SoC — ½ × ½ slot TQVB TinyQV - Crowdsourced RISC-V SoC (0.5x1) — ½ × 1 slot TQVC TinyQV - Crowdsourced RISC-V SoC (1x0.5) — 1 × ½ slot
  10. Jun 2026 · Tiny Tapeout GF 0.3 TinyQV RISC-V SoC — 4 × 2 tiles
  11. Jul 2026 · wafer.space Run 2 TQVA TinyQV - Crowdsourced RISC-V SoC — ½ × ½ slot TQVC TinyQV - Crowdsourced RISC-V SoC (1x0.5) — 1 × ½ slot TQVD TinyQV - RISC-V SoC with HDMI output — ½ × ½ slot, 3.3 V standard cells and SRAM, HDMI output TQVE TinyQV - RISC-V SoC with experimental pad setup — ½ × ½ slot, 3.3 V, with an experimental pad setup

Tiny Tapeout tile Google shuttle wafer.space die

From a Tiny Tapeout tile to a whole die

TinyQV RISC-V SoC started as a few tiles on Tiny Tapeout 6 and went on to dies of its own on wafer.space Run 1 and wafer.space Run 2. When your design outgrows its tiles, a whole die on a wafer.space run is the next step.

Reserve a slot on wafer.space Run 3

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Submit a project
Buy this chip

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.

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