Tiny Tapeout GF 26b · Die T26B on wafer.space Run 2

ASCON Integrated Crypto Processor

295 · Security · 4 × 4 tiles

by Dr. Mohamed El-Hadedy

Rendered from the layout at 0.90 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

Logic density

Core average
logic cells per mm²
28k (37% of buffer maximum)
Densest 0.1 mm square
logic cells per mm²
36k (47% of buffer maximum)
Core covered by logic83%
Transistor density
transistors per mm²
321k average, 344k in the 0.1 mm square with the most logic cells

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

AEAD-only SDMC ASCON cryptographic processor with UART command/control, using the CISC-style AEAD core. HASH, XOF, CXOF, and chain modes are intentionally excluded from this branch.

Size1440 × 737 µm (1.061 mm²)
Macrott_um_mealycpp_ascon_sdmc_uart
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26b
Tiles4 × 4 at column 0, row 15 of the tile grid
Mux address295
LanguageVerilog
Clock50 MHz
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors342,061
Logic cells30,184 + 27,866 filler and tap cells
Libraries 7t-5V (30k)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

83%
15%
  • Logic cells 0.89 mm² (83%)
  • Filler and tap cells 0.16 mm² (15%)
  • Other 0.02 mm² (2%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
dffrnq_17t-5V 4,516D flip-flop with reset
nand2_17t-5V 3,1652-input NAND gate
oai21_17t-5V 2,394OR-AND-Invert compound gate
clkinv_17t-5V 2,232Clock inverter
dlyb_17t-5V 2,230Delay buffer
clkbuf_27t-5V 2,107Clock buffer (2x drive)
aoi22_17t-5V 1,319AND-OR-Invert (2x2 inputs)
buf_27t-5V 1,273Buffer (2x drive)
aoi21_17t-5V 1,239AND-OR-Invert compound gate
buf_17t-5V 1,155Buffer

Logic density map

273 logic cells, 2,986 transistors 282 logic cells, 3,120 transistors 291 logic cells, 3,193 transistors 282 logic cells, 3,164 transistors 270 logic cells, 3,123 transistors 274 logic cells, 3,096 transistors 271 logic cells, 3,090 transistors 271 logic cells, 3,152 transistors 267 logic cells, 3,110 transistors 275 logic cells, 3,145 transistors 263 logic cells, 3,130 transistors 273 logic cells, 3,132 transistors 279 logic cells, 3,129 transistors 292 logic cells, 3,133 transistors 80 logic cells, 1,085 transistors 282 logic cells, 3,104 transistors 285 logic cells, 3,268 transistors 302 logic cells, 3,224 transistors 288 logic cells, 3,259 transistors 279 logic cells, 3,229 transistors 270 logic cells, 3,253 transistors 263 logic cells, 3,250 transistors 263 logic cells, 3,229 transistors 279 logic cells, 3,223 transistors 294 logic cells, 3,310 transistors 281 logic cells, 3,220 transistors 279 logic cells, 3,232 transistors 285 logic cells, 3,247 transistors 290 logic cells, 3,291 transistors 83 logic cells, 1,136 transistors 254 logic cells, 3,040 transistors 254 logic cells, 3,221 transistors 281 logic cells, 3,224 transistors 268 logic cells, 3,246 transistors 258 logic cells, 3,261 transistors 247 logic cells, 3,188 transistors 251 logic cells, 3,218 transistors 260 logic cells, 3,182 transistors 256 logic cells, 3,252 transistors 256 logic cells, 3,214 transistors 257 logic cells, 3,237 transistors 264 logic cells, 3,155 transistors 268 logic cells, 3,203 transistors 269 logic cells, 3,271 transistors 81 logic cells, 1,107 transistors 310 logic cells, 3,062 transistors 309 logic cells, 3,276 transistors 359 logic cells, 3,363 transistors 325 logic cells, 3,360 transistors 292 logic cells, 3,159 transistors 271 logic cells, 3,067 transistors 270 logic cells, 2,966 transistors 272 logic cells, 3,233 transistors 273 logic cells, 3,082 transistors 291 logic cells, 3,198 transistors 307 logic cells, 3,221 transistors 296 logic cells, 3,235 transistors 309 logic cells, 3,333 transistors 274 logic cells, 3,171 transistors 89 logic cells, 1,121 transistors 309 logic cells, 3,170 transistors 360 logic cells, 3,404 transistors 292 logic cells, 3,510 transistors 330 logic cells, 3,374 transistors 315 logic cells, 3,397 transistors 327 logic cells, 3,352 transistors 308 logic cells, 3,301 transistors 319 logic cells, 3,349 transistors 326 logic cells, 3,344 transistors 321 logic cells, 3,402 transistors 306 logic cells, 3,352 transistors 323 logic cells, 3,277 transistors 330 logic cells, 3,309 transistors 291 logic cells, 3,198 transistors 83 logic cells, 1,173 transistors 280 logic cells, 3,097 transistors 283 logic cells, 3,333 transistors 312 logic cells, 3,370 transistors 314 logic cells, 3,425 transistors 295 logic cells, 3,267 transistors 300 logic cells, 3,388 transistors 290 logic cells, 3,401 transistors 299 logic cells, 3,312 transistors 301 logic cells, 3,372 transistors 298 logic cells, 3,319 transistors 294 logic cells, 3,315 transistors 292 logic cells, 3,328 transistors 308 logic cells, 3,364 transistors 289 logic cells, 3,267 transistors 77 logic cells, 1,139 transistors 219 logic cells, 3,124 transistors 270 logic cells, 3,203 transistors 284 logic cells, 3,375 transistors 258 logic cells, 3,393 transistors 306 logic cells, 3,305 transistors 278 logic cells, 3,425 transistors 271 logic cells, 3,372 transistors 271 logic cells, 3,323 transistors 297 logic cells, 3,303 transistors 302 logic cells, 3,351 transistors 288 logic cells, 3,283 transistors 297 logic cells, 3,278 transistors 290 logic cells, 3,319 transistors 288 logic cells, 3,267 transistors 85 logic cells, 1,167 transistors 75 logic cells, 1,028 transistors 104 logic cells, 1,073 transistors 127 logic cells, 1,092 transistors 80 logic cells, 1,131 transistors 97 logic cells, 1,143 transistors 113 logic cells, 1,116 transistors 92 logic cells, 1,067 transistors 97 logic cells, 1,100 transistors 99 logic cells, 1,137 transistors 108 logic cells, 1,124 transistors 103 logic cells, 1,153 transistors 107 logic cells, 1,134 transistors 133 logic cells, 1,086 transistors 107 logic cells, 1,066 transistors 29 logic cells, 385 transistors Densest SRAM-free 0.1 mm square: 360 logic cells 27k 28k 29k 28k 27k 27k 27k 27k 27k 27k 26k 27k 28k 29k 28k 28k 30k 29k 28k 27k 26k 26k 28k 29k 28k 28k 28k 29k 25k 25k 28k 27k 26k 25k 25k 26k 26k 26k 26k 26k 27k 27k 31k 31k 36k 32k 29k 27k 27k 27k 27k 29k 31k 30k 31k 27k 31k 36k 29k 33k 31k 33k 31k 32k 33k 32k 31k 32k 33k 29k 28k 28k 31k 31k 29k 30k 29k 30k 30k 30k 29k 29k 31k 29k 22k 27k 28k 26k 31k 28k 27k 27k 30k 30k 29k 30k 29k 29k

Logic cells per mm² in each 0.1 mm square of the project (counted in the square, scaled up to a mm²). Hatched outlines are SRAM macros; the red outline is the densest 0.1 mm square that avoids them (36k logic cells per mm²), found by sliding a 0.1 mm square over the project in 20 µm steps, so it can straddle the fixed squares and find more than any one of them. Squares at the edges are partial, so they read low.

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.