Tiny Tapeout GF 0.3 · Die T0P3 on wafer.space Run 2
74HCT00 Quad 2-Input NAND (3.3 V)
005 · Analog and mixed-signal · 1 × 2 tiles
by Vipul Sharma · repository @engrvip123
Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings
Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.
Open-source silicon realization of 74HCT00 TTL-compatible quad 2-input NAND on gf180mcuD at 3.3 V
Source repository Its page on Tiny TapeoutBuy a chip and board
| Size | 347 × 325 µm (0.113 mm²) |
|---|---|
| Macro | tt_um_74hct00 |
| Files | documentation · licence · layout and netlist in Tiny Tapeout GF 0.3 |
| Tiles | 1 × 2 at column 1, row 8 of the tile grid |
| Mux address | 5 |
| Language | Analog |
| Transistors | 112 |
| Logic cells | 0 |
| SRAM | No SRAM |
Process features
Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.
| 3.3 V | 112 custom transistors |
|---|---|
| Gate oxides | Thin only (3.3 V) in the design itself |
Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.