Tiny Tapeout GF 26b · Die T26B on wafer.space Run 2

Universal Binary to Segment Decoder

451 · Other digital · 1 × 1 tile

by Rebecca G. Bettencourt

Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

606 logic cells: too few for density figures, which are given for projects of 1,000 or more.

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

Decodes various binary codes to various segmented displays.

Size347 × 161 µm (0.056 mm²)
Macrott_um_rebeccargb_universal_decoder
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26b
Tiles1 × 1 at column 5, row 2 of the tile grid
Mux address451
LanguageVerilog
Built withLibreLane 3.0.0, open_pdks 54435919abff
Transistors13,773
Logic cells606 + 1,296 filler and tap cells
Libraries 7t-5V (606)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

28%
64%
  • Logic cells 0.02 mm² (28%)
  • Filler and tap cells 0.04 mm² (64%)
  • Other 4,033 µm² (7%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
nand2_17t-5V 722-input NAND gate
nand3_17t-5V 433-input NAND gate
aoi21_17t-5V 33AND-OR-Invert compound gate
nor2_17t-5V 322-input NOR gate
buf_27t-5V 30Buffer (2x drive)
oai21_17t-5V 29OR-AND-Invert compound gate
nand4_17t-5V 274-input NAND gate
buf_87t-5V 26Buffer (8x drive)
oai211_17t-5V 22OR-AND-Invert compound gate
buf_47t-5V 20Buffer (4x drive)

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.