Tiny Tapeout GF 26b · Die T26B on wafer.space Run 2

WashingMachine_FSM

387 · Other digital · 1 × 1 tile

by Charithma Perera, Kim Luu

Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

108 logic cells: too few for density figures, which are given for projects of 1,000 or more.

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

Washing Machine Control

Size347 × 161 µm (0.056 mm²)
Macrott_um_KimLuu02_WashingMachine_FSM
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26b
Tiles1 × 1 at column 2, row 2 of the tile grid
Mux address387
LanguageVerilog
Clock100 MHz
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors11,720
Logic cells108 + 1,350 filler and tap cells
Libraries 7t-5V (108)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

87%
  • Logic cells 3,003 µm² (5%)
  • Filler and tap cells 0.05 mm² (87%)
  • Other 4,033 µm² (7%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
dffq_17t-5V 15D flip-flop (1 bit storage)
clkinv_17t-5V 14Clock inverter
nand2_17t-5V 112-input NAND gate
nor2_17t-5V 72-input NOR gate
dlyb_17t-5V 5Delay buffer
nand3_17t-5V 53-input NAND gate
oai31_17t-5V 5OR-AND-Invert compound gate
or2_17t-5V 52-input OR gate
and2_17t-5V 42-input AND gate
aoi22_17t-5V 4AND-OR-Invert (2x2 inputs)

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.