Tiny Tapeout GF 26b · Die T26B on wafer.space Run 2

ECC Scalar Multiplication

007 · Other digital · 1 × 1 tile

by Dhanush Kulkarni

Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

65 logic cells: too few for density figures, which are given for projects of 1,000 or more.

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

Compact 8-bit ECC Scalar Multiplication Engine demonstrating scalar-point arithmetic for Tiny Tapeout.

Size347 × 161 µm (0.056 mm²)
Macrott_um_ecc_scalar_mult
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 26b
Tiles1 × 1 at column 0, row 8 of the tile grid
Mux address7
LanguageVerilog
Clock50 MHz
Built withLibreLane 3.0.3, open_pdks 54435919abff
Transistors11,676
Logic cells65 + 1,274 filler and tap cells
Libraries 7t-5V (65)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

89%
  • Logic cells 2,369 µm² (4%)
  • Filler and tap cells 0.05 mm² (89%)
  • Other 4,033 µm² (7%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
dlyb_17t-5V 16Delay buffer
nand2_17t-5V 122-input NAND gate
xor2_17t-5V 112-input XOR gate
dffrnq_27t-5V 8D flip-flop with reset (2x drive)
nor2_17t-5V 42-input NOR gate
and2_17t-5V 32-input AND gate
clkbuf_167t-5V 3Clock buffer (16x drive)
buf_27t-5V 2Buffer (2x drive)
aoi21_17t-5V 1AND-OR-Invert compound gate
aoi221_27t-5V 1AND-OR-Invert compound gate (2x drive)

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.