Tiny Tapeout GF 0.2 · Die TTP2 on wafer.space Run 1: the standard edition

One Bit PUF

612 · Security · 1 × 1 tile

by Yimin Gao and Ceylan Morgul

Rendered from the layout at 0.33 µm per pixel. Layers: NwellDiffusionPolysiliconMetal 1Metal 2Metal 3Metal 4Metal 5Top metalPad openings

977 logic cells: too few for density figures, which are given for projects of 1,000 or more.

Every figure here is measured from the public layout, the same way for every design on the chip: see data and method, and how its designs used the process.

It is a PUF based on a difference of two registers

Size347 × 161 µm (0.056 mm²)
Macrott_um_multi_bit_puf_wrapper
Filesdocumentation · licence · layout and netlist in Tiny Tapeout GF 0.2
Tiles1 × 1 at column 6, row 18 of the tile grid
Mux address612
LanguageVerilog
Built withLibreLane 2.4.2, open_pdks 0fe599b2afb6
Transistors14,020
Logic cells977 + 1,914 filler and tap cells
Libraries 7t-5V (977)
SRAMNo SRAM

Process features

Which parts of the GF180MCU process this design uses: its transistor voltages and where they come from, its gate oxides, and any devices drawn by hand outside the standard cells, SRAM and pads.

5 V7t-5V standard cells
Gate oxidesThick only (5 V/6 V) in the design itself

Where the area went

How this project's area splits between logic cells, filler and tap cells and other.

45%
48%
  • Logic cells 0.03 mm² (45%)
  • Filler and tap cells 0.03 mm² (48%)
  • Other 4,033 µm² (7%)

Most used cells

The ten standard cells this design uses most.

CellLibraryInstancesWhat it does
latq_17t-5V 256Latch (level-sensitive)
nor2_17t-5V 2562-input NOR gate
or2_17t-5V 2562-input OR gate
buf_27t-5V 43Buffer (2x drive)
mux4_17t-5V 324-input multiplexer
clkbuf_27t-5V 30Clock buffer (2x drive)
buf_17t-5V 28Buffer
clkbuf_17t-5V 13Clock buffer
clkinv_17t-5V 9Clock inverter
dffrnq_27t-5V 8D flip-flop with reset (2x drive)

Want your own design on a chip like this one?

Start with a tile: the next Tiny Tapeout GF180MCU chips take projects until 7 December 2026, for wafer.space Run 3. For a die of your own, wafer.space Run 3 takes orders until 9 December 2026.

Tiny Tapeout and wafer.space are independent companies that work together (announcement). Tiny Tapeout runs its own shuttles: it takes the projects, builds the die, and sells and supports the chips and boards. wafer.space has the dies manufactured on its GF180MCU runs, and these pages are wafer.space's measurements of them. For anything about a Tiny Tapeout project, chip or order, contact Tiny Tapeout.